This invention relates to a means for testing and diagnosing integrated circuits (chips) and relates, in particular, to a means for locating open (disconnected) input terminals, or input terminals that are becoming disconnected, or locating openings in the interconnect between the input terminals and the output terminals of other chips, and means for locating shorted output terminals, as well as identifying chips whose logic function has become defective.
A number of means for testing the operational integrity of components or subsystems of data processing systems have been developed and the necessity for rapid and easy identification of defective chips has long been recognized.
A number of prior art test systems for diagnosing defective data processing components were mentioned by the inventors EL-Hasan and Packard in their U.S. Pat. No. 3,739,160 entitled, "Method and Apparatus for Fault-Testing Binary Circuit Subsystems" which issued on June 12, 1973. This patent also taught that a binary subsystem, by reason of its components and circuitry, had a character, or unique identification, in the form of binary signals generated thereby when a plurality of binary signals, in a known pattern, were applied cyclicly be a device, therein called a Word Generator. A defective subsystem was located by applying such a known pattern of binary signals cyclicly for a selected number of times, then comparing the signals generated by the subsystem with the character of binary signals derived under identical conditions from a known to be good binary subsystem. If there was no match, then a fault in the subsystem was indicated.
Recognizing this advance in the art by the aforementioned patent, the state of the art was advanced a step further by taking a given integrated circuit chip and identifying the unique pattern of binary signals that will appear on the terminals of the chip when selected binary signals, or routines, are cyclicly applied a selected number of times to the chip by a tester (Generator as referred to in the patent). Such a unique pattern is called character identification or Signature, and after cyclicly applying the routines, if the Signature is not realized, the logic function of the chip is determined to be defective. Thus, each chip, i.e., a memory circuit, a register circuit, a driver-receiver circuit, etc., has a unique Signature and there is a routine in the tester for each class of such chips. In addition, each chip has a pattern of binary signals, or codes, encoded thereon which will identify the class to which the chip belongs and this code can also be found again by cyclicly applying binary signals to the chip by the tester. Circuitry is also provided on the chip so that the Signature is recognized (or not recognized if the chip is malfunctioning) and the class code identified, on one output terminal.
Thus, utilizing this invention which forms part of the chip itself, a field technician is first able to identify the type chip he is testing and then, once having found the proper class of chip, is able to detect a malfunction of the logic circuitry, if any.
As hereinabove mentioned, however, also forming part of the chip, is circuitry which will enable the field technician to identify any disconnected inputs or shorted outputs of the chip before going through the process of identifying the chip class and signature. This, of course, enables the field technician to save the time and expense of testing a chip for logic malfunction in the event the problem lies in the area of a disconnect or short to and from the chip itself.
It is, therefore, a general object of this invention to provide a means for monitoring the integrity of the inputs and outputs of an integrated circuit chip as well as the integrity of the logic function of the chip.
A more specific object of this invention is to provide, in the integrated circuit chip itself, an Input Open Detector to monitor the chip for any input leads that are disconnected, or are becoming disconnected, and to indicate that such a disconnection or anticipated disconnection exists.
Still another specific object of the invention is to provide, in the integrated circuit chip itself, an Output Short Detector to monitor the chip for shorts at any chip output and to indicate that such a short exists.
Still another and very important object of this invention is to provide a Signature Test and Diagnostic circuit, forming part of the chip itself, to enable a technician to determine if the logic function of the chip itself is operational or whether it is malfunctioning.
Finally, another object of this invention is to provide means by which the Input Open Detector, the Output Short Detector and the Signature Test and Diagnostic circuit are implemented on only one terminal of the chip.